Clear-behind matrix addressing for display systems
US5798743A · kind A · utility
75Cited by
38References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Aug 25, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/2018
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display system uses a weighted PWM scheme to deliver control during a frame time for developing a plurality of grayscale levels in each of a plurality of pixels. Of all the weighted subframes, a predetermined number of the shortest subframes utilize a like subframe duration. However, to provide additional levels of grayscale, differing durations of `on` time are utilized in these like subframes. Thus, all but one of these like-time subframes has a dead zone time during which the pixels are never activated. A clear circuit turns `off` the illuminated pixels during the dead zone time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.