Method and device for soft-driving an array of logic gates and suppression of switching distortion
US5798959A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 1996 |
| Grant date | Aug 25, 1998 |
| Priority date | — |
| Expiry date | Jul 15, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Switching distortion in a digitally controlled attenuator is effectively suppressed and soft-switching in passgate arrays, present at a certain point of a logic signal path, is implemented with a minimum number of additional components. The soft switching in passgate arrays is implemented by driving the control nodes of each passgate by an inverter, at least a current terminal of which is made switchable from the respective supply node to a node onto which an appropriate ramp signal toward the potential of the respective supply potential is produced by a suitable controlled ramp generator. The passgates for switching the current terminals of the inverters are controlled by the logic signal that preexisted the intervening switching on the respective signal line of the passgate, and by its inverse. The preexistent logic value is momentarily stored in a latch that is updated at the end of any new switching process. The switching distortion is suppressed by causing a fast turn-on of the selected switch and a slowed-down turn-off of the deselected switch and by connecting in parallel to the portion of the resistive voltage divider pertaining to the change of output tap a shunt resistanc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.