Comparator with built-in hysteresis
US5801553A · kind A · utility
12Cited by
18References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 5, 1996 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Sep 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/226
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.