Activatable/deactivatable circuit arrangement for producing a reference potential
US5801582A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 1997 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | May 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Activatable/deactivatable circuit arrangement for producing an output reference voltage having a first transistor (T1) whose emitter is connected with a reference potential (M) and whose base and collector are connected with one another, having a second transistor (T2) whose base is connected with the base of the first transistor (T1), having a first resistor (R1) that is connected between the collector of the first transistor (T1) and an output terminal (U) for supplying the output reference voltage, having a second resistor (R2) that is connected between the collector of the second transistor (T2) and the output terminal (U), having a third resistor (R3) that is connected between the emitter of the second transistor (T2) and the reference potential (M), having a third transistor (T3) whose base is connected with the collector of the second transistor (T2) and whose emitter is connected with the reference potential (M), and having a controlled current source (T4) that is connected between a supply potential (V) and the output terminal (U), and that is coupled at the input side with the collector of the third transistor (T3), whereby the collector-emitter path of a fifth transistor…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.