Processor having an adaptable mode of interfacing with a peripheral storage device
US5802550A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1996 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Jan 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor having an adaptable and self-setting mode of interfacing with a peripheral storage device is provided. The processor comprises a variable-parameter controller which enables the processor to adaptably interface with a peripheral storage device. Upon powering up, the controller first interfaces with the peripheral storage device in accordance with a default mode of operation of the peripheral storage device to extract configuration data from the peripheral storage device. The configuration data relates to at least one alternate mode of operation of the peripheral storage device. The controller then interfaces with the peripheral storage device in accordance with the alternate mode of operation. The processor includes a memory device connected to the variable-parameter controller for storing the configuration data so that it is accessible to the controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.