Method and apparatus for controlling the writing and erasing of information in a memory device
US5802551A · kind A · utility
157Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1994 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Aug 19, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to rearrange the memory area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.