Method and apparatus for quickly modifying cache state
US5802574A · kind A · utility
39Cited by
8References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1996 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Jun 24, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0891
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The state of cached data may be modified without performing a tag comparison. Each cache line includes at least one attribute bit and at least one state bit. A processor issues an instruction requesting modification of the state of all cache lines associated with an attribute specified by the instruction. Qualifying logic modifies the state of a cache line as a function of the attributes stored in the cache line and the attribute specified by the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.