High density metal gate MOS fabrication process
US5804485A · kind A · utility
5Cited by
5References
6Claims
0Family size
Inventor
Key dates
| Filing date | Feb 25, 1997 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Feb 25, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A high density metal gate metal-oxide semiconductor fabrication process to selectively and locally oxidize specific regions of a wafer without increasing the numbers of mask, so as to separately control the thickness of the oxide at the gate, P+ zones and N+ zones, the process including the step of forming a first tye trap zone, the step of forming a shielding layer consisting of an oxide pad and a nitride layer, and the step of forming an oxide layer and removing the nitride layer but the oxide pad to be left before the growing of an insulative oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.