Bonding pad in semiconductor device
US5804883A · kind A · utility
7Cited by
9References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 1996 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Jul 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bonding pad in a semiconductor device having at least one slit is provided. In the semiconductor device including a passivation layer covering the bonding pad and metal wiring, at least one slit is formed on the bonding pad for electrically connecting the metal wiring to external leads of the semiconductor device. The slit formed in the bonding pad may be filled with a molding compound to buffer the stresses caused by a wire-bonding process. Hence, stress-induced corrosion may be reduced and PCT reliability may be enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.