Data erase mechanism for nonvolatile memory of boot block type
US5805510A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 1997 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Oct 17, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The total number of bits of irregular blocks is equal to the number of bits of one equal block. The memory cells of the irregular blocks are sequentially designated using an address counter used to designate the memory cells of equal blocks. An erase operation (including pre program and erase operations) starts from "verify". Only when "verify" is NG, the pre program and erase operations are performed. A means capable of fixing a verify result VERIOK at "1" (verify OK) is arranged to always set VERIOK at "1" for a non-select block of the irregular blocks, thereby preventing execution of the pre program and erase operations for the non-select block of the irregular blocks. Accordingly, in the boot block type, the same address counter is shared by the equal and irregular blocks to reduce the circuit scale.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.