Method of forming an integrated circuit
US5805862A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1995 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Nov 16, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A simulation input and a model file are generated. The simulation input file is processed to generate object code, entries, line counts, and comment lines. A simulation program is run that uses the object code, entries, line counts, and input comment lines. A machine captures and links output comment lines with their associated test vectors by using the entries and line counts to form a simulation results file. After the simulation, the simulation results file can be reviewed. After simulation, masks (30, 40, 50, 60, 70) are generated that are used to form integrated circuits (20). The present invention can also be used for testing integrated circuits. The test methods use a test input file generated from the simulation results file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.