MOS charge pump generation and regulation method and apparatus
US5808506A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 1, 1996 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Oct 1, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
MOS charge pump generation and regulation method and apparatus of the general type used in a non-volatile memory chip for generating high voltages (.about.20 v). This invention utilizes a current controlled oscillator to generate the clock for the charge pump voltage multiplier. The oscillator frequency is designed to compensate for process, temperature and power supply variations. The charge pump shunt regulator only utilizes regular low voltage NMOS and PMOS from a standard CMOS process. A reference voltage scheme is used in which a regular low voltage PMOS is used as a mirror diode (reference PMOS) to precisely realize a control voltage for the shunting NMOS without violating any breakdown mechanism, i.e. PMOS gated diode breakdown and P+ to n-well junction breakdown. A medium voltage level is also used to buffer the shunting NMOS transistors from gated diode breakdown. A native NMOS cascode current mirror is used to precisely mirror the current to achieve minimum headroom voltage with minimum circuit area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.