Printed circuit board layering configuration for very high bandwidth interconnect
US5808529A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 12, 1996 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Jul 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0979
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A ground plane interconnection is provided on first and second substrates, the first and second substrates having respective first and second ground layers disposed on a first surface of each of the first and second substrates. A ground conductor strip is disposed on a second surface of the second substrate, wherein the ground conductor strip includes a plurality of electrically conductive members which pass through the second substrate to electrically couple the ground conductor strip and the second ground layer. The first substrate is positioned with respect to the second substrate such that when the first substrate is placed proximate the second substrate, the ground conductor strip electrically couples the first and second ground layers to form a continuous ground plane. A method of forming a reduced-inductance continuous ground plane is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.