Synchronization control unit which maintains synchronization between serial-to-parallel converters operating in parallel, or between parallel-to-serial converters operating in parallel
US5808571A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 1997 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Jan 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0685
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A synchronization control unit for synchronizing serial-to-parallel (S/P) converters operating in parallel, or parallel-to-serial (P/S) converters operating in parallel. More specifically, first and serial-to-parallel (S/P) converters produce respectively corresponding first and second clock signals and operate in parallel. The first and second clock signals are in synchronization, and a synchronization failure occurs when the first and second clock signals fall out of synchronization. When a synchronization failure occurs, the synchronization control unit resets one of the first and second clock signals so that synchronization between the first and second clock signals is restored within a definite time period. Moreover, the synchronization control unit can perform the same operation with parallel-to-serial (P/S) converters, instead of with S/P converters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.