Detachable memory apparatus capable of varying number of wait states for access based on stored timing information
US5809517A · kind A · utility
49Cited by
13References
15Claims
0Family size
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Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing apparatus capable of varying the number of wait states for access to the memory according to the access time. An interchangeable external memory unit stores data on the number of wait states for access, and the apparatus reads the data and accordingly controls the number of wait states, thus realizing an optimum process speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.