Nonvolatile memory devices including lockable word line cells
US5809553A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1996 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Dec 20, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory devices and methods include an array of nonvolatile memory cells which are arranged in a plurality of rows and a plurality of columns. A plurality of word lines are also included, a respective one of which is connected to the nonvolatile memory cells in a respective one of a plurality of columns. A plurality of lockable cells are also included. A respective one of the lockable cells is connected to a respective one of the plurality of word lines. Each of the lockable cells stores therein a first or a second binary value. The first binary value indicates that nonvolatile memory cells which are connected to the corresponding column of word lines cannot be erased or reprogrammed. The second binary value indicates that nonvolatile memory cells which are connected to the corresponding column of words lines can be erased or programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.