Optimized power output clamping structure
US5812006A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Oct 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An optimized power output clamping structure, includes a power output transistor having a first breakdown voltage and a breakdown structure having a second breakdown voltage coupled to the power output transistor. The second breakdown voltage is less than the first breakdown voltage and follows the first breakdown voltage across all temperature and semiconductor process variations. This feature allows a reduction in breakdown voltage guardbanding and increases output structure reliability. A method of protecting a circuit from inductive flyback is also disclosed. The method includes the steps of driving an inductive load with drive circuitry, turning off the inductive load, and clamping an inductive voltage at a voltage magnitude that protects the drive circuitry from breakdown across all temperature and processing variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.