Voltage offset compensation circuit
US5812023A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 21, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Feb 21, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/303
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage offset compensation circuit for a high gain amplifier having a fixed input voltage offset, includes sample and hold circuitry for periodically sampling the offset voltage and gain error voltage of the amplifier, and holding the sampled voltage; storage circuitry, operable between sampling periods, to store the sampled and held voltage; and further circuitry, operable during the sampling periods, to continuously maintain the output of the high gain amplifier at a value that is gain error and voltage offset compensated. The voltage offset compensation circuit may be used in sampled-data circuits, or continuous-time amplifier circuits utilizing either single-ended, or differential, inputs and either single-ended, or differential, outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.