Method and circuit arrangement for processing received signal
US5812608A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | May 3, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0057
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention is related to a method and circuit arrangement for processing a received signal in a variable symbol rate system, such as a digital television system. In the method and arrangement according to the system, a received signal is sampled at a fixed sampling frequency (f.sub.f) that is higher than the symbol frequency of any one of the received signals. The resulting sample sequence is converted to another sample sequence the sampling frequency of which equals the symbol frequency (f.sub.i) of the received signal or its integer multiple. Then the samples are filtered (8) and signal value decisions are made (9) for the filtered samples. Conversion of the sampling frequency is advantageously performed using a so-called modified Farrow-type fractional delay filter (6) which is controlled using a control signal proportional to the delay of each sample. Using the method and arrangement according to the invention it is possible to process received signals the symbol frequencies of which are arbitrary within set limits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.