Method and apparatus providing multiple voltages and frequencies selectable based on real time criteria to control power consumption
US5812860A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Feb 12, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for reducing power consumption in a processor core. A state machine is used to coordinate a frequency from a clock signal generator with a voltage from a voltage regulator which is sufficient to allow operation of the processor at that frequency. Both the clock signal generator and the voltage regulator must be able to generate at least two frequencies or voltages, respectively. A level of processor need is tracked and the lowest frequency/voltage pair that will allow the processor core to satisfy the need is selected. The level of processor need is monitored either periodically or continually such that a new frequency/voltage pair can be dynamically selected as the application mix changes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.