Fabrication method of semiconductor test piece
US5814528A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1996 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Oct 10, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method for a test piece for observing non-contact regions in a pair of bonded semiconductor substrates includes thinning one substrate of a pair of bonded semiconductor substrates, grade-polishing the thinned semiconductor substrate and the bonded semiconductor substrates to have a predetermined graded angle relative their bonded surfaces, and dry-etching an area around the bonded surfaces of the grade-polished semiconductor substrates to reveal faults. With the thusly fabricated test piece, micro non-contact regions can be simply observed and crystal faults existing on the bonded surfaces as well as in the micro non-contact regions can be easily detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.