Methods for forming integrated circuit isolation layers using oxygen diffusing layers
US5814551A · kind A · utility
10Cited by
3References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1996 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Nov 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76202
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an integrated circuit isolation layer includes the steps of forming a patterned masking layer of a semiconductor substrate, forming an oxygen diffusing layer on the patterned masking layer and the exposed portion of the semiconductor substrate, and forming an isolation layer on the exposed portion of the substrate. In particular, the oxygen diffusing layer can be a layer of SiON, and the oxygen diffusing layer can have a thickness in the range of 30 .ANG. to 150 .ANG.. The oxygen diffusing layer and the mask layer can then be removed completing the isolation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.