Static random access memory having transistor elements formed on side walls of a trench in a semiconductor substrate
US5814895A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 1996 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Dec 19, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
In a static random access memory (SRAM), a memory cell ratio is increased without deteriorating an integration degree of this SRAM. The static random access memory is arranged by: trenches formed in a semiconductor substrate and an insulating layer for isolating elements within a memory cell forming region; one pair of word transistors; one pair of driver transistors for constituting a flip-flop by forming channel regions of the driver transistors in side surfaces of the trenches and by cross-connecting gate electrodes thereof and drain electrodes thereof at one pair of input/output terminals of the flip-flop; and one pair of word transistors connected between the one pair of input/output terminals of the flip-flop and a bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.