Method of validating memory structures in data processing systems
US5815656A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1992 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Sep 23, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0866
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system executes a plurality of processes in parallel. The processes access shared user records stored in memory serially. One or more data structures are used to track access by processes to the data structures and to the user records. Responsive to a fault occurring in a first parallel process, a signal is given the remaining parallel processes indicating the failure. Responsive to the failure, it is determined if the faulting parallel process had access to one of the data structures. Depending upon the circumstances of access, integrity of the user records may be assumed and the record validated. The data structures themselves can be examined to determine if the contents of memory is reliable. Typically the data structures support use of the memory as a cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.