Circuit arrangement for operating electric lamps, and an operating method for electronic lamps
US5825136A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 1997 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | Mar 27, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S315/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The circuit arrangement according to the invention has a self-oscillating inverter having at least two alternately switching transistors (Q1, Q2), a load circuit connected to the inverter output and designed as a resonant circuit (L1, C1), and terminals for at least one electric lamp (LP). According to the invention, the control junction of a transistor (T1) is arranged in the emitter line of one of the inverter transistors (Q2). Via the variable conductivity of this control junction, the effective emitter resistance of the inverter transistor (Q2) is continuously varied as a function of the voltage drop across one of the resonant circuit components (C1), and the clock frequency of the inverter (Q1, Q2) is thereby increased so far that because of the now stronger detuning with respect to the resonant frequency of the resonant circuit (C1, L1) a reduction in the no-load voltage in the load circuit is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.