Output buffer circuit
US5825207A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 19, 1996 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | Jul 19, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3674
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit includes first and second transistors of a first conductivity type, having first terminals connected in common and second terminals connected to first and second power supplies. The output buffer circuit also includes third and fourth transistors of a second conductivity type, having first terminals connected in common and second terminals connected to third and fourth power supplies. First and second resistors connected in series are connected between a common connecting point of the first and second transistors, and a common connecting point of the third and fourth transistors. A connecting neutral point serves as an output terminal. Damage resulting from excessive current or pass-through current when executing a switching process can thereby be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.