Patent · US Expired

Driver circuit including slew rate control system with improved voltage ramp generator

US5825218A · kind A · utility

29Cited by
9References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 24, 1996
Grant dateOct 20, 1998
Priority date
Expiry dateOct 24, 2016

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K17/667
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A voltage ramp generator for a driver circuit is provided to give an output that is highly linear between zero and a maximum voltage has a combination of current sources or generators for charging and discharging a capacitor, with discharging performed by sequencing two different types of current sources. A first current source on the discharge side of the capacitor has transistors in cascode connected current mirrors and takes the capacitor voltage to a low value but not as low as zero. A second current source of a basic or simple current mirror then takes the capacitor voltage substantially to zero. The voltage ramp generator meets the requirements of high performance, integrated, driver circuits, particularly for achieving complete turn-off of a power device such as a DMOS transistor in a high side cascoded transistors goes up to a threshold near the full supply driver. It is optional to have two current sources for charging, also, where a first source with voltage and than a second source, in a basic current mirror, continues charging substantially to the supply voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.