Method of optimizing component layout using a hierarchical series of models
US5825660A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1995 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | Sep 7, 2015 |
Classification
- Technology area (CPC E)Fixed Constructions
- CPC primaryE21B2200/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of optimizing a three-dimensional component layout in accordance with predetermined constraints is comprised of the steps of generating a plurality of models for each component. The plurality of models is arranged in a hierarchy from the model having the least resolution to the model having the most resolution. A starting layout is selected for the components. An iterative type of optimization routine is performed wherein each iteration is evaluated for satisfaction of the constraints using models for the components selected according to the level of resolution desired at that time in the iterative process. The optimization routine ends when a predetermined ending criterion is met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.