Memory system and method for simultaneously reading and writing data
US5825692A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 1997 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | Mar 20, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device (SP) which is used for the sequential storage and reading out of a given amount of data. To this end it contains a memory (RAM) which can be read and written into in parallel and a storage control unit (CON) which ensures that storage areas whose data have previously been read out at least once is written into sequentially and successively with a default safety clearance. In a special configuration, an input interface (SPU) and an output interface (PSU) are arranged upstream and downstream, respectively, of the memory (RAM). These interfaces accept and transfer the data serially outwards and in parallel to the memory (RAM), respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.