Serial input shift register built-in self test circuit for embedded circuits
US5825785A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1996 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | May 24, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/83
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A highly functional built in self test circuit for embedded compiled macros is useful for testing embedded compiled macros having differing parameters. The built in self test circuit receives a scan vector that describes the parameters of the embedded compiled macro that is to be tested. For, example, the number and width of words stored in a read only memory (ROM) are scanned into the built in self test circuit for controlling the test sequences. A state machine within the built in self test circuit cycles through test vector generation, test vector application, data output scanning and compression for signature analysis. Parallel outputs of the embedded compiled devices are serialized so that regardless of the number of outputs, a serial input shift register can be used for signature generation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.