Method of forming a landing pad structure in an integrated circuit
US5828130A · kind A · utility
19Cited by
31References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Dec 3, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least one of the plurality of conductive regions. After the polysilicon is patterned and etched to form the landing pad, tungsten is then selectively deposited over the polysilicon to form a composite polysilicon/tungsten landing pad which is a good etch stop, a good barrier to aluminum/silicon interdiffusion and a good conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.