Gate drive circuit that controls a power transistor in three states
US5828261A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Nov 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6877
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one aspect of the present invention a gate drive circuit is disclosed. The gate drive circuit includes a first voltage source, a power transistor, a first and second switching device, and a controller. The power transistor has a drain connected to the first voltage source and a source connected to a load. The first switching device is connected to the power transistor gate and biases the power transistor ON to transfer energy from the first voltage source to the load. The second switching device is connected to the power transistor gate and biases the power transistor OFF to block the transfer of energy from the first voltage source to the load. The controller is connected to the first and second switching device and controls the power transistor at a first state where the first switching device biases the power transistor ON, controls the power transistor at a second state where the second switching device biases the power transistor OFF and provides a signal path from the power transistor gate to ground, and controls the power transistor at a third state where the second switching device biases the power transistor OFF to protect the second switching device from short circuit …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.