System and method for interfacing a transport decoder to a elementary stream video decorder
US5828416A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Mar 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/52
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A transport decoder 110, for receiving and processing a transport data stream using MPEG-2 formats, includes connections to a physical layer channel interface (channel interface) 112, a buffer memory 114, a host microprocessor 116, audio and video decoders 118/120, and clock signal circuitry 122. To properly interface with a video decoder requiring an elementary datastream, the headers of received data are stripped and parsed (step 510), timestamp information is stored and a byte count is maintained (step 512), an interrupt is issued by video processor 224 to microprocessor 116 alerting it that timestamp information is available for reading (step 514), if additional timestamp information is received before microprocessor reads the previous timestamp information, the new timestamp information is stored, the byte count continues to accumulate (step 516) and the video processor 224 issues another interrupt to the microprocessor 116 (step 514), otherwise microprocessor reads the status register, the timestamp information and the byte count information and delivers it to the external video decoder (step 518).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.