Decoder circuit and method for disabling a number of columns or rows in a memory
US5828624A · kind A · utility
11Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Dec 23, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention concerns a method and apparatus for disabling columns using a local fuse decoding system. The present invention uses local decoding in order to use a number of fuses that is less than the number of columns in order to disable column failures. This is particularly useful when the fuse pitch is greater than the column pitch which does not allow for a fuse to be implemented in each column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.