Dual bus concurrent multi-channel direct memory access controller and method
US5828856A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Mar 21, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access (DMA) controller is connected to the CPU bus of a computer system through a bus interface and is also connected to an I/O bus, which is coupled to one or more I/O controllers. Multiple channels, each corresponding to a particular I/O controller, are contained within the DMA controller. The DMA controller controls DMA transfers between the I/O controllers and the main memory of the system and allows multiple transfers to occur concurrently. The DMA controller controls transfers in part through a first arbiter which arbitrates requests for access to the CPU bus coming from the DMA channels and a second arbiter which arbitrates requests for access to the I/O bus coming from the DMA channels and the CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.