Circuit arrangement for operating electric lamp
US5831396A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S315/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The invention relates to a circuit arrangement for operating electric lamps, having a free-running half-bridge inverter (Q1, Q2). An auxiliary transistor (T1, T2) is in each case connected into the control circuits of the half-bridge inverter transistors (Q1, Q2), so that the emitter impedance of each half-bridge inverter transistor (Q1, Q2) is formed by a parallel circuit which consists of at least one resistor (R5) or (R7) and the control path, arranged in parallel therewith, of the corresponding auxiliary transistor (T1) or (T2). The control inputs of the two auxiliary transistors (T1, T2) are, furthermore, connected to the output of a common control circuit (IC). These measures make it possible to switch over the effective emitter impedance and therefore the feedback of the half-bridge inverter (Q1, Q2) as a function of the operating phases of the lamp (LP) and thus, in simple fashion, to vary the clock frequency of the half-bridge inverter within wide limits by virtue of the dimensioning of the resistors (R5, R6; R7, R8) of the parallel circuits (R5, R6, T1) or (R7, R8, T2) according to the invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.