DC-stabilized power circuit
US5831471A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 1996 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Jul 12, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A dc-stabilized power circuit which has a PNP-type output transistor that is connected between input and output terminals, a base-driving circuit for controlling the driving current of the base of the output transistor in response to the difference between a voltage obtained by voltage-dividing the output voltage from the output terminal and a reference voltage that has been preliminarily determined, and a driving-current suppressing circuit for detecting a voltage between the input and output terminals and for suppressing a driving current released by the driving-current supplying means based upon the result of the detection. The greater the input-output voltage, the further the driving-current suppressing circuit suppresses the driving current from the base-driving circuit to the output transistor, thereby suppressing the output current. Thus, in a dc-stabilized power circuit of a low-loss type which has no current-detecting resistor connected in the output line and which is provided with a control circuit that is constructed as an integrated circuit and that supplies a driving current to the base of the output transistor in response to the output voltage, the power loss due to t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.