Shared memory fabric architecture for very high speed ATM switches
US5831980A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 1996 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Sep 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A shared memory fabric architecture for asynchronous transfer mode (ATM) switches including a multi-dimensional array of electrically interconnected N*M switch modules, where N>>M. The fabric architecture also includes input ports for providing cells to the array of switch modules. The input ports operate at a predetermined speed S. The fabric architecture additionally includes memory devices electrically connected to the array to provide a hierarchical memory structure at each switch module. The memory devices include on-chip, high-speed memory devices operating at a high-speed memory speed of N*S and off-chip, low-speed memory devices operating at a low-speed memory speed of (Y+M)*S, where Y<<N.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.