Integrated circuit with memory programmable pad driver
US5834955A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1996 |
| Grant date | Nov 10, 1998 |
| Priority date | — |
| Expiry date | Dec 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017581
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The integrated circuit with programmable pad driver involves an integrated circuit (IS1) with at least one pad driver that has a programming unit (PE) and a plurality of sub-drivers (T1 . . . Tm). A specific driver intensity and edge steepness of the pad driver can be set in that a corresponding plurality of sub-drivers connected to a common terminal contact (PAD) at their output side are activated/deactivated dependent on output signals (P1 . . . Pm) of the programming unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.