Method and apparatus for dynamically placing portions of a memory in a reduced power consumtion state
US5835435A · kind A · utility
124Cited by
2References
22Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 2, 1997 |
| Grant date | Nov 10, 1998 |
| Priority date | — |
| Expiry date | Dec 2, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for dynamically placing portions of a memory in a reduced power consumption state. Requests to access a memory that includes a plurality of rows of memory components are received. One or more of the plurality of rows of memory components are placed in a reduced power consumption state based on the requests while one or more other rows of the plurality of rows are accessed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.