Apparatus and method for interfacing a peripheral device having a ROM BIOS to a PCI bus
US5835960A · kind A · utility
20Cited by
33References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1996 |
| Grant date | Nov 10, 1998 |
| Priority date | — |
| Expiry date | Dec 9, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for providing a conversion technique to allow an eight bit ROM BIOS to be read on a 32 bit PCI bus. A separate address port for the ROM BIOS is provided which is not connected to the PCI bus. The conversion bus takes data from the ROM BIOS at a separate data port, assembles four cycles of eight bits in a 32 bit fashion and delivers that data to the PCI bus. When the PCI bus requests 4 bytes, the system of the present invention assembles 4 bytes from the 8 bit data and transmits that data to the PCI bus as a 32 bit quantity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.