Method and apparatus for compressing system read only memory in a computing system
US5836013A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1994 |
| Grant date | Nov 10, 1998 |
| Priority date | — |
| Expiry date | Aug 11, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chipset (platform)-independent method and apparatus for compressing and decompressing a system ROM of a computer (e.g., BIOS, setup program, and one or more option ROMs) are disclosed. The setup program, option ROM, and part of the BIOS are compressed using a lossless compression algorithm. A non-compressible portion of the BIOS includes a decompression algorithm and a shadow RAM block table of chipset-specific registers and bit patterns to write-enable and read-enable shadow RAM (RAM that is mapped to the ROM address space). The compressed data is stored in a compressed data block format with the associated location in memory to decompress the compressed data. Thus, the data can be decompressed anywhere in memory of a target computer. For example, the BIOS is decompressed to shadow RAM and the setup program is decompressed to conventional memory. During the BIOS Power-On Self-Test (POST) process, the compressed system ROM is copied to conventional memory, and the decompression program is executed. The decompression program write-enables shadow RAM (with reference to the the chipset-specific information in the shadow RAM block table), copies the non-compressible BIOS from convent…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.