Process for bonding a shell to a substrate for packaging a semiconductor
US5837562A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 1995 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Jul 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/163
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing a vacuum enclosure for a semiconductor device formed on a substrate with leads extending peripherally. Assembly of the enclosure is compatible with known batch fabrication techniques and is carried out at pressures required for optimal device operation. In a first embodiment, an intrinsic silicon shell is sealed to the substrate via electrostatic or anodic bonding with the leads diffusing into the shell. In a second embodiment, a thin interface layer of silicon or polysilicon is deposited on the substrate prior to electrostatic bonding a glass shell thereon. In a third embodiment, tunnels are formed between a lower peripheral edge of the shell and the substrate, allowing leads to pass thereunder. The tunnels are sealed by a dielectric material applied over the enclosure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.