High voltage transistor for sub-micron CMOS processes
US5837571A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 23, 1996 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Jul 23, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/945
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention relates to methodology to resolve the problem of low drain/source breakdown voltage (BVdss) in small geometry devices with thin gate oxide. Improved drain diffusion profile implanting through disjoint NSD/NWELL windows in the extended drain region, This provides essentially an improved lightly diffused (LDD) structure. Further this invention relates to alternative methods to resolve the problem of low drain/source breakdown voltage in other structures which can be achieved by for example, building a number of side wall oxide layers, impurity compensation or oxygen implantation. The improved LDD structure to which this invention relates has a number of advantages when compared with other solutions. It enables high voltage transistors to be fabricated with high drive capability, without additional process steps being required to implement the structure. The inventions will find applications wherever a high voltage capability is required to interface with the outside world. Such designs would include automotive applications; programming transistors for Field Programmable Gate Arrays; Robust I/O's and ESD Protection Circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.