Method of manufacturing a semiconductor device
US5837591A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 1997 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Feb 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
Abstract
A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.