Digital data processing methods and apparatus for fault isolation
US5838899A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1996 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Jun 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1633
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault-isolating digital data processing apparatus includes plural functional units that are interconnected for point-to-point communications by a plurality of buses. The functional units monitor the buses to which they are attached and signal the other units in the event there are bus communication errors. The functional units can simultaneously enter into an error isolation phase, e.g., in response to a bus error signaled by one of the units. During this phase, each unit transmits test data (e.g., predetermined patterns of O's and 1's) onto at least one of its attached buses. The functional units continue to monitor the buses and to signal bus errors while the test data is being transmitted. In addition to signaling bus errors, the functional units can signal unit-level (or "board") faults when they detect fault in their own operation. To this end, each unit includes error isolation functionality that signals a fault based on (i) whether that unit signaled a loopback error with respect to its own operation; (ii) whether that unit or another unit signaled a bus error during the error isolation phase; and/or (iii) whether any other functional unit signaled that it was faulty durin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.