Data storage system
US5839906A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 1995 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Sep 28, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/1459
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A computer/disk storage system interface is provided having disk controller, CPU controller, and cache memory printed circuit boards interconnected through buses provided in a backplane. The backplane has columns of electrical connectors. Each electrical connector has a plurality of rows of pins. One portion of the pins in each row is electrically connected to one bus and the other portion of the pins is electrically connected to the other bus. Each printed circuit board has an electrical connector adapted to connect with the backplane electrical connectors. While the number of pins in the each row of the cache memory printed circuit board electrical connector is the same as the number of pins in each row of the backplane electrical connector, the number of pins in each row of the controller printed circuit board electrical connector is less than the number of pins in the row of pins in the backplane electrical connector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.