High density multi-layered printed wiring board, multi-chip carrier and semiconductor package
US5841190A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1996 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Feb 23, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4644
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package (11) includes a high density multi-layered printed wiring board (12), a plurality of LSI chips (14,15) and a substrate supporter (13). A substrate (16) is made of a material having higher heat conductivity than that of resins. A build-up layer (17) having interlayer insulations (I1-I4) and conductive layers (C1-C5) is formed on a first side (S1) of the substrate (16). A die area (19) for mounting the LSI chips (14,15) is provided on the build-up layer (17). A plurality of I/O pads (21) are provided around the die area. The I/O pads (21) are connected to bonding pads (28) on the supporter (13) via bonding wires. The supporter (13) includes a printed wiring board (23) consisting essentially of a resin material. The wiring board (12) is fitted in a window (24) formed in the printed wiring board (23) while a second side (S2) of the substrate, which is opposite to the first side, is exposed from the window. Heat generated in the LSI chips (14,15) is efficiently released from the second side of the substrate (S2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.