Differential amplifier circuit with a high through put rate and reduced power consumption
US5841317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1996 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Feb 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/30057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifier achieving a high throughput rate with reduced power consumption includes a differential circuit, output circuit, a constant current source transistor, a drive transistor, and a switching circuit. A difference voltage relative to a difference between voltages applied to non-inverting and inverting inputs of the differential circuit is applied to the switching circuit. The switching circuit supplies a drive signal to the drive transistor to enable the drive transistor when the difference voltage is below a predetermined threshold voltage, and to disable the drive transistor when the difference voltage is above the predetermined threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.