Fully-integrated high-speed interleaved voltage-controlled ring oscillator
US5841325A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 1997 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | May 12, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0231
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An interleaved, tunable ring oscillator is disclosed that produces more output phases without resorting to interpolation. The oscillator is inherently symmetrical and suffers from none of the systematic time errors of an interpolator approach. The oscillator stages are interconnected to allow the oscillating frequency to be higher than the conventional limit of 1/(2*N*T.sub.D). Frequency tuning is accomplished by electronically varying the delay of each stage of the ring oscillator. A mixer cell performs a weighted sum of a first input and a second delayed input. The delay ranges from the delay of the mixer itself to the sum of the delays of the mixer and the delay cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.